A Highland Technology V680 TDC (Time to Digital Converter) Driver for EPICS


I have had the opportunity to work with Graham Waters to develop an EPICS driver for the Highland V680 TDC (Time to Digital Converter).The driver works in a VxWorks environment and takes advantage of the EPICS Histogram Record. A Motorola MVME-162 CPU card and the TDC module in a VME crate form a complete data acquisition system. When an event is accepted by the TDC it generates a hardware interrupt. The interrupt service routine uses the EPICS Histogram Record to count the number of events for each time bin and stores the information in memory on the CPU card.


At TRIUMF we will use the TDC system in the TUDA line of our ISAC facility. The TUDA line carries a beam of stable or radioactive ions with A/q from 3 to 6 and with energies from 0.153 to 1.53 MeV/u. Just up stream of the TUDA experimental area we have a silicon detector monitor. The ions will scatter from a thin gold foil into an Ortec PIPS silicon detector placed at a forward angle of 30 degrees. The time of arrival of the resulting electrical pulse with respect to the RF of the acceleration system will allow us to measure the bunch shape of the ions beam. This will facilitate tuning of our Linac and bunchers to obtain a short bunch at TUDA for the experimenters. The RF bunches will arrive with a frequency of 11.6 MHz, or 5.8 MHz if our chopper in on. The bunch width varies from a few nanoseconds to a part of a nanosecond and the event rate from the detector may vary from 10,000 per second for a stable ion down to 1 per second for a rare radioactive species.

Mode of Operation of the TDC

One of the trickiest parts of writing the driver was to first define the mode of operation of the TDC. It is a complex module with many modes available for a range of uses. Graham and I passed several entertaining afternoons trying to convince each other of the best choice. In the end, we chose the following scheme. The driver initializes the TDC to use Standard Mode and Positive Time Mode and readout is performed in Relative Mode. We input the pulse from the silicon detector to the Reference (REF) input of the TDC and the RF from the accelerator into Input Channel 0 (IN0) of the TDC.

IN0 is held off due to Positive Time Mode. An event on the REF causes the Time Counter to be stored in TDC register t1 and also enables IN0. The next RF pulse on In0 causes the new Time Counter value to be stored in register t2 and then generates an interrupt. The interrupt service routine disables further interrupts and reads out t = t2 - t1, histograms the event in the CPU memory, performs resets and then re-enables the interrupts. The 32 MHz Motorola CPU requires about 130 microseconds to process each interrupt.

The RF at IN0 is 11.6 MHz. In practice, we also provide RF at 5.8 MHz and 2.9 MHz to IN1 and IN2. The use of the Interrupt Selection Mask in the TDC allows us to select which RF reference frequency we use. This lets us measure the population of bunches over many RF cycles to determine the efficiency of the chopper, provides a built in time scale calibration and more fully utilizes the capabilities of the module.


We wish to thank Pierre Amaudruz (TRIUMF) and Carl Lionberger (LBL) for providing us with samples of their application codes.


We welcome any chance to help you with implementing the Highland V680 in your EPICS system. Of course, our source code will be available. Please contact me, Bill Rawnsley, at rawnsley@triumf.ca or Graham Waters at waters@triumf.ca.